14.1 A Leading-Edge 0.9um Pixel CMOS Image Sensor Technology with Backside Illumination: Future Challenges for Pixel Scaling (Invited), S.G. Wuu, C.C. Wang, B.C. Hseih, Y.L. Tu, C.H. Tseng, T.H. Hsu, R.S. Hsiao, S. Takahashi, R.J. Lin, C.S. Tsai, Y.P. Chao, K.Y. Chou, P.S. Chou, H.Y. Tu, L.Tran,
In this paper, a leading edge N65 0.9um pixel BSI technology using 300mm bulk silicon wafer is reported with process breakthroughs. Challenges to go beyond <0.9um pixel size are discussed.